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PE4230
Product Specification
Evaluation Kit
The SPDT Switch Evaluation Kit board was
designed to ease customer evaluation of the
PE4230 SPDT switch. The RF common port is
connected through a 50 ? transmission line to the
top left SMA connector, J1. Port 1 and Port 2 are
connected through 50 ? transmission lines to the
top two SMA connectors on the right side of the
board, J3 and J4. A through transmission line
connects SMA connectors J6 and J8. This
transmission line can be used to estimate the loss
of the PCB over the environmental conditions
being evaluated.
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031”. The
bottom layer provides ground for the RF
transmission lines. The transmission lines were
designed using a coplanar waveguide with ground
plane model using a trace width of 0.030”, trace
gaps of 0.007”, dielectric thickness of 0.028”,
metal thickness of 0.0014” and ε r of 4.4.
J2 provides a means for controlling DC and digital
inputs to the device. Starting from the lower left
pin, the second pin to the right (J2-3) is connected
to the device CNTL input. The fourth pin to the
right (J2-7) is connected to the device V DD input.
A decoupling capacitor (100 pF) is provided on
both CNTL and V DD traces. It is the responsibility
of the customer to determine proper supply
decoupling for their design application. Removing
these components from the evaluation board has
not been shown to degrade RF performance.
Document No. 70-0029-02 │ www.psemi.com
Figure 12. Evaluation Board Layouts
Peregrine Specification 101/0037
Figure 13. Evaluation Board Schematic
Peregrine Specification 102/0035
?2005 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 7
Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
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